What's next

These are functions engineers use in Keil MDK, IAR Embedded Workbench, STM32CubeIDE and STM32CubeMX, STM32CubeProgrammer, MCUXpresso, Code Composer Studio, e2 studio, ModusToolbox, MPLAB X, SEGGER Ozone and SystemView, and Lauterbach TRACE32 that the module does not do yet. While one of them matters to you, you still open the vendor tool for it. None of them is available today; the list is not a commitment to dates.

Separately from this list, every capability that is built still needs its first run against the vendor tool, on Windows and on a board, before it counts as verified; see Verification state.

Projects and configuration

• Keil multi-project workspaces (.uvmpw).
• Excluding a file from a Keil target, and keeping the .uvoptx file in step with project edits.
• IAR per-file option overrides, and editing IAR batch build definitions.
• Optimisation, language and warning level of IAR and Keil projects as editable fields.
• The remaining Keil Options for Target pages: Device, Target (memory areas, crystal), Output (HEX file), Listing (map file), Asm and Linker (scatter file).
• The remaining IAR Options pages: General Options (device, library configuration), Assembler, Output Converter, Build Actions, and the Linker with an .icf editor.
• STM32CubeIDE per-file settings, referenced projects and nested dual-core projects, and its other options as editable fields.
• MCUXpresso IDE and e2 studio projects: their .cproject options and in-place builds.
• Editing IAR custom argument variables (.custom_argvars).
• CMSIS solutions as in Keil Studio: opening a *.csolution.yml, building contexts with cbuild, software components and their dependencies, pack version constraints, and converting a uVision project with uv2csolution.
• New projects as IAR or Keil projects, and with the vendor HAL and drivers added; MCUXpresso SDK examples and installed SDKs.
• Device pack removal and version pinning.
• Projects of TI Code Composer Studio, Renesas e2 studio with FSP, Infineon ModusToolbox and AURIX Development Studio, and Microchip MPLAB X, with their builds.
• The Zephyr workflow: west workspaces, sysbuild, board selection, devicetree and Kconfig.

Editing

• clangd compile commands for Keil projects.
• Arm Compiler 6 keywords translated for clangd as IAR's are.
• IAR __packed followed by a line break before struct; headers outside the include folders refreshed without a new configure or build.
• A fallback for iarbuild versions without -jsondb.

Build

• Batch builds of several targets or configurations at once.
• Size reports from IAR ILINK map files and .icf regions, and from armlink map and scatter files; sections and symbols for Keil builds.

Tests and runtime analysis

• Unit tests that run on the target over semihosting or RTT, collected in the Testing view.
• Code coverage on the target, and hardware-in-the-loop results (Twister, pytest-embedded) in the Testing view.
• C-RUN rules files (--rtc_rules) and the default action; C-RUN reports from a GDB or probe session.
• Arm Fixed Virtual Platforms as a target for tests in CI.
• Runtime checks with UBSan reported over semihosting.

Flash and programming

• Multi-image and multi-core flashing.
• Flashing with the pack's .FLM flash algorithms, custom algorithms and IAR flash loaders.
• Option bytes through J-Link and TRACE32, and for STM32 families beyond OpenOCD's stm32f2x driver; other vendors' option bytes and fuses (such as Microchip configuration bits).
• Secure provisioning: TrustZone, secure firmware install, product states and debug authentication on STM32; the NXP Secure Provisioning Tool.
• External flash through the STM32 bootloader (-elbl), and the CAN bootloader.
• J-Flash Lite.
• Production programmers of other vendors: TI UniFlash, Renesas Flash Programmer, Microchip MPLAB IPE, Infineon MemTool and the DFU host tool.
• Bootloaders and over-the-air updates: MCUboot signing, slots and DFU.

Debug

• Multi-core debug: one session for both cores of an STM32H7, i.MX RT1170 or LPC55S69, and TRACE32 SMP and AMP sessions.
• Live values while the core runs through the ST-LINK GDB server and TRACE32; writing values back from Live Watch and Live Plot; sliders, buttons and dashboard widgets; serial data streams and high-speed J-Link sampling as Live Plot sources.
• Peripheral registers refreshed while the core runs.
• Data log and trace start and stop breakpoints.
• Armv8-M secure fault registers (SFSR, SFAR) in the Fault view.
• More of the vendor set-up scripts: uVision debugger commands (LOAD, g, BS, RESET) and debug functions, C-SPY's other setup functions and its "Register" zone.
• Breakpoint counts, commands and conditions imported enabled; memory windows imported from Keil and IAR.
• Ozone script functions run, and $(InstallDir) paths resolved.
• Debug settings written back to Keil's .uvoptx; STM32CubeIDE .launch files imported.
• .dbgconf values applied by the debug session.
• Debugging from a core dump.
• TRACE32: running a .cmm in a running session, ~~ paths, reading Break.List back, trace-trigger breakpoint actions, Lauterbach .per peripheral files, run-time memory access, and TriCore and other non-Arm architectures.
• Probes: IAR I-jet, TI XDS110, Renesas E2, Microchip PICkit and ICD, Infineon KitProg3 and DAS, NXP S32 Debug Probe, and pyOCD.

RTOS awareness

• Kernel readers for embOS, Keil RTX5, uC/OS, TI-RTOS, ChibiOS and NuttX.
• FreeRTOS software timers, heap and SMP in the RTOS view, and a CSV export of the task list.
• The CMSIS-View Component Viewer and Event Recorder (SCVD).
• The MICROSAR OS, RTA-OS and tresos AutoCore OS dialects of ORTI, checked on their files.
• Heap use of ThreadX, Zephyr and RTX5.

Trace, timing and power

• An exception and interrupt timeline with entry and exit times, DWT event counters and data trace over SWO.
• ETM, ETB and MTB instruction trace, and code coverage from trace (J-Trace, ULINKpro, TRACE32).
• SEGGER SystemView recording and a task timeline; Percepio Tracealyzer snapshots.
• Power and energy against code: ULINKplus, I-jet, J-Link power sampling, MCU-Link Pro, EnergyTrace; the STM32CubeMX power calculator.
• The Armv8.1-M performance monitoring unit in Benchmark Counters, and TRACE32 counter and event names read from TRACE32.
• XY and eye-diagram modes in the Buffer Graph.

Static analysis and safety evidence

• Vendor analysers: IAR C-STAT, PC-lint Plus, Polyspace and Helix QAC, with their findings in Problems.
• Stack reports from IAR ILINK and Arm Compiler, and the worst case over the call graph checked against task stacks.
• SARIF and HTML export of the MISRA results.
• Errata checks, and comparisons that understand firmware files.

Device, pins and clocks

• A clock tree editor.
• Peripheral, clock and middleware configuration with code generation through the vendor generators: STM32CubeMX, MCUXpresso Config Tools, SysConfig, the RA Smart Configurator, the ModusToolbox Device Configurator and MPLAB Code Configurator.
• Pin changes written back into the .ioc, and the .ioc's peripheral and clock settings read.
• Pin configuration for devices other than STM32.
• Searching devices by peripheral count or memory size.
• Bus clock limits for devices other than STM32F405 and STM32F407.
• IAR's SFR Setup save file and .ewd device description override.
• STM32MP DDR configuration and test tools.

Other

• Agent tools for the CMake build, flashing, the probe connection test and fault diagnosis.
• In the emulator: the emulated chip's UART output, a ready CI job, and a machine for the STM32F407; Renode for parts QEMU does not emulate.
• Debug windows at the vendor's screen positions; Keil's Ctrl+F7 and F9 keys.
• Rust firmware through probe-rs and defmt.
• Non-Arm families: PIC, C2000, RX, RL78, TriCore.