SVD & Register Maps

Neural Inverse parses ARM CMSIS SVD (System View Description) files to provide complete peripheral register maps with editor integration.

SVD Loading

SVD files are loaded in three ways:

1. Bundled — Common MCUs have pre-indexed SVDs (zero download)
2. Auto-fetch — Downloads from CMSIS Packs for recognized MCUs
3. Manual — Specify path in Firmware.inverse:

{
  "svd": "docs/STM32F407.svd"
}

Or upload via agent:

> fw_upload_datasheet docs/STM32F407.svd

What Gets Parsed

The SVD parser handles the full ARM CMSIS SVD specification:

• derivedFrom inheritance — Peripherals and registers that derive from others
• Cluster expansion — Grouped registers resolved into flat map
• Dimension arrays — Repeated peripherals (e.g., GPIOA..GPIOK) expanded
• Default value inheritance — Device → peripheral → register cascade
• Access types — read-only, write-only, read-write, writeOnce, read-writeOnce
• Enumerated values — Named constants for bit field values

Output Structure

Each parsed SVD produces:

IPeripheralRegisterMap {
  name: "USART1",              // Peripheral instance name
  groupName: "USART",          // Peripheral type
  baseAddress: 0x40011000,     // Base address
  registers: [
    {
      name: "CR1",
      offset: 0x00,
      size: 32,
      access: "read-write",
      resetValue: 0x00000000,
      bitFields: [
        {
          name: "UE",
          offset: 0,
          width: 1,
          access: "read-write",
          description: "USART enable",
          enumeratedValues: [
            { name: "Disabled", value: 0 },
            { name: "Enabled", value: 1 }
          ]
        },
        // ... all bit fields
      ]
    }
  ],
  interrupts: [
    { name: "USART1", irqNumber: 37, description: "USART1 global interrupt" }
  ]
}

Editor Integration

Completions

When typing register names in C/C++ code, the LSP bridge provides:

• Register names with addresses
• Bit field names with widths
• Peripheral instance names
• Hardware constants

Completions are priority-sorted by peripheral relevance to the current file context.

Hover Info

Hovering over a register access shows:

• Register name and peripheral
• Base address + offset (hex)
• Reset value
• ASCII bit field layout diagram
• Enumerated values for each field
• Source reference (SVD file)

Diagnostics

The firmware LSP detects common register access issues:

• Missing volatile qualifier on register pointers
• Incorrect bit manipulation patterns
• Non-atomic read-modify-write on shared registers
• Unbounded polling loops (MISRA violation)
• Stack-allocated VLAs in interrupt context

Agent Tools

Register Compositor

The register compositor service helps compute register values:

> fw_compute_register_values USART1_CR1 baudrate=115200 wordLength=8 parity=none

Returns the exact hex value to write, with each bit field explained.

> fw_decode_register_value USART1_CR1 0x0000200C

Shows what each set bit means in human-readable form.