Code Generation

The firmware agent generates hardware-aware code using your MCU's register maps, clock constraints, and peripheral configurations. All generated code includes datasheet citations.

Generators

Peripheral Initialization

> fw_generate_peripheral_init USART1 baudrate=115200 wordLength=8 parity=none stopBits=1

Generates complete initialization code including:

• Clock enable for the peripheral and GPIO port
• GPIO alternate function configuration
• Peripheral register configuration
• NVIC interrupt enable (if applicable)
• Proper initialization order

Supported peripherals: GPIO, UART/USART, SPI, I2C, ADC, DAC, DMA, Timer, RTC, PWM, CAN, USB, Ethernet, SDIO, RNG, DCMI, FSMC, QSPI

GPIO Configuration

> fw_generate_gpio_config PA5 mode=output speed=high pullup=none

> fw_generate_gpio_config PA9 af=USART1_TX speed=very_high

Validates against the MCU's AF database to ensure the pin supports the requested function.

DMA Configuration

> fw_generate_dma_config peripheral=USART1_RX buffer=rx_buf size=256 circular=true

Generates DMA stream/channel configuration with:

• Correct stream/channel assignment for the peripheral
• Priority, FIFO, burst configuration
• Circular or normal mode
• Transfer complete interrupt handler

Clock Configuration

> fw_generate_clock_config target_sysclk=168MHz hse=8MHz

Solves PLL parameters (M, N, P, Q) within the MCU's constraints and generates the clock initialization code.

ISR Generation

> fw_generate_isr DMA1_Stream0 USART1

Generates ISR stubs with:

• Correct vector table names
• Flag clearing
• Typical handler patterns (e.g., DMA transfer complete, UART RX)
• MISRA-compliant volatile access patterns

Linker Script

> fw_generate_linker_script

Generates a GNU ld .ld script populated from the MCU's memory map:

• Flash origin and length
• RAM regions (SRAM1, SRAM2, CCM, ITCM, DTCM)
• Stack and heap configuration
• Section placement (.text, .data, .bss, .rodata)
• Interrupt vector table placement

RTOS Task Template

> fw_generate_rtos_task name=sensor_read stack=512 priority=3

Generates a task template for the configured RTOS:

• FreeRTOS: xTaskCreate with task function
• Zephyr: K_THREAD_DEFINE macro
• Embassy: async task with #[embassy_executor::task]

Init Sequence

> fw_generate_init_sequence

Generates a complete initialization sequence for the project:

1. System clock configuration
2. GPIO initialization
3. Peripheral initialization (in dependency order)
4. NVIC priorities
5. DMA setup
6. Main loop entry

Code Quality

All generated code follows:

• MISRA C patterns (volatile pointers, explicit casts, no implicit conversions)
• Datasheet-cited comments (register descriptions from SVD)
• Language-appropriate style (C, C++, or Rust)
• No dynamic allocation in interrupt context